Digital Electronics - Study Mode
[#151] Consider the following gate network Which one of the following gates is redundant?
Correct Answer
(B) Gate No. 2
[#152] The logic circuit realized by the circuit shown in the given figure will be
Correct Answer
(D) $${ ext{F}} = { ext{A}} oplus { ext{C}}$$
[#153] If (0.100) 2 = (x) 10 , then x is
Correct Answer
(A) 0.5
[#154] If the input to a T flip-flop is a 100 MHz signal, the final output of three T flip-flop in a cascadeis:
Correct Answer
(D) 12.5 MHz
[#155] In a JK flip-flop, J is connected to $$overline { ext{Q}} $$ and K is connected to Q outputs. The JK flip-flop converts into a
Correct Answer
(C) T flip flop