Computer Architecture - Practice Test

(A) Rising edge of the clock

(B) Falling edge of the clock

(C) Middle state of the clock

(D) Transition state of the clock

(A) Rising edge of the clock

(A) The operation has resulted in an error

(B) The operation requires an interrupt call

(C) The result is zero

(D) There is no empty register available

(C) The result is zero

(A) As soon as the trap pin becomes 'LOW'

(B) By checking the trap pin for 'high' status at the end of each instruction fetch

(C) By checking the trap pin for 'high' status at the end of execution of each instruction

(D) By checking the trap pin for 'high' status at regular intervals

(C) By checking the trap pin for 'high' status at the end of execution of each instruction

(A) The operation is valid

(B) The operation is validated

(C) The operation has resulted in an overflow

(D) None of the mentioned

(C) The operation has resulted in an overflow

(A) General purpose registers

(B) Stacks

(C) Memory locations

(D) None of the mentioned

(A) General purpose registers

Computer Architecture - Study Mode