Computer Architecture - Study Mode
[#586] When the R/W bit of the status register of the DMA controller is set to 1.
Correct Answer
(A) Read operation is performed
[#587] The registers of the controller are . . . . . . . .
Correct Answer
(C) 32 bits
[#588] In set associative and associative mapping there exists less flexibility.
Correct Answer
(B) False
[#589] . . . . . . . . is/are types of exceptions.
Correct Answer
(D) All of the mentioned
[#590] The bit present in the op code, indicating which of the operands is the source is called as . . . . . . . .
Correct Answer
(C) Direction bit